To obtain a multichannel pulse width modulator in which operational reliability can be prevented from lowering due to simultaneous rising of PWM signals.
When a PWM signal 48m is generated from PWM generators 50m (m=1-M), where M is the number of channels, each PWM generator 50m delivers PWM start schedule data 28m indicative of the rising timing of the PWM signal 48m to a CPU 10. When the number of PWM signals 48 rising substantially simultaneously based on the PWM start schedule data 28m exceeds a predetermined value, the CPU 10 delivers delay set data 70m for a channel corresponding to the part exceeding the predetermined value, as data indicative of a delay, to the PWM generator 50m. If the delay set data 70m indicates a delay, the PWM generator 50m delays the PWM signal 48.
TOYODA SHINJIRO
TOYODA TAKASHI
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