PURPOSE: To allow an open test for each of a plurality of semiconductor chips mounted on a multichip semiconductor device.

CONSTITUTION: Semiconductor chips 1-1, 1-2 mounted on a board 2 are provided with I/O pads P1, P2 connected with internal circuits, switching transistors Qn4, Qn6 connected with the I/O pads, and additional I/O pads P3, P4 for controlling the switching transistors. The board 2 is provided with I/O pads P1', P2' connected with the I/O pads P1, P2 of the semiconductor chips 1-1, 1-2, additional I/O pads P3', P4' connected with the additional I/O pads P3, P4 of the semiconductor chips, an I/O pin connected with these I/O pads, and test pins T3, T4 connected with the additional I/O pads. The semiconductor chips 1-1, 1-2 are activated and inactivated individually by turning the switching transistors ON/ OFF with the voltages of the test pins T3, T4.