Title:
MULTILAYER PRINTED WIRING BOARD
Document Type and Number:
Japanese Patent JPH01179494
Kind Code:
A
Abstract:
PURPOSE:To improve a multilayer printed wiring board remarkably in packaging efficiency by a method wherein a corresponding through-hole is chipped off by a drill, a packaging pad is formed through the intermediary of an insulator by means of an additive plating, and a clothed wire pad is provided at the same time. CONSTITUTION:A part of a conductor of through-holes 119a and 119b which are connected with pads 101a and 101b is mechanically removed by a drill to insulate a pattern 102c electrically from the pads 101a and 101b. A pad 109 is formed at the position of component mounting pads 101a and 101b through an additive plating technique after the through-holes 119a and 119b are filled with an insulator 120, and moreover clothed wire pads 110 and a wiring pattern 111 are formed. The clothed wire pads 110 are connected with each other through a clothed wire 121 and then the processing is completed. By these processes, a multilayer printed wiring board is remarkably improved in packaging efficiency.
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Inventors:
NAKAHARA TAKASHI
Application Number:
JP185688A
Publication Date:
July 17, 1989
Filing Date:
January 08, 1988
Export Citation:
Assignee:
NEC CORP
International Classes:
H05K3/46; (IPC1-7): H05K3/46
Attorney, Agent or Firm:
Naoki Kyomoto (3 outside)