Document Type and Number:
Japanese Patent JP2002368560
Kind Code:
A
Abstract:
To reduce shot noises in a multiplier (mixer).
The multiplier is provided with a first differential amplifier DA1, second and third differential amplifiers DA2 and DA3 which are respectively connected to the sources of a pair of transistors M5 and M6 in the first amplifier DA1, a first resistance component R1 connected to the output terminals of M1 and M3 which are respectively ones of the pair of transistors of the second and the third differential amplifiers DA2 and DA3 and a second resistance component R2 connected to the output terminals of the M2 and M4 which are the other ones of the pair of transistors of the amplifiers DA2 and DA3. The pair of transistors M5 and M6 of the first differential amplifier DA1 are made of a MOSFET and the pairs of transistors M1, M2 and M3, M4 of the second and the third differential amplifiers DA2 and DA3 are made of a bipolar transistor(BJT). Then a current source for permitting prescribed currents Ia and Ib to flow is connected to the respective sources of the pair of transistors M5 and M6 of the first differential amplifier DA1.
Inventors:
MIYASHITA KIYOSHI
Application Number:
JP2001168483A
Publication Date:
December 20, 2002
Filing Date:
June 04, 2001
Assignee:
ASAHI CHEMICAL MICRO SYST
International Classes:
G06G7/16; H03F3/45; (IPC1-7): H03F3/45; G06G7/16
Domestic Patent References:
Foreign References:
| EP0998025A1 | 2000-05-03 | | | |
| US5933771A | 1999-08-03 | | | |
Attorney, Agent or Firm:
Sugimura Kosaku (1 person outside)
