To provide a multiplier minimized in crossmodulation with good frequency characteristic and minimized in DC offset or dispersion of gain.

A MOS transistor of a CMOS inverter is operated in a saturated area. Correction drive signals Vn and Vp for correcting the DC offset of the CMOS inverter are generated from a correction drive signal output circuit 60 and supplied to transistors 11 and 16. MOS transistors 17 and 18 are connected to the output terminal Tout of the CMOS inverter as diode load. The transistor of the CMOS inverter for supplying input signals Vin and -Vin while superposing on the bias voltages from voltage sources 31 and 32 and the transistors 17 and 18 are transistors of the same channel. By the ratio of mutual conductance gm of the transistor for supplying the input signals Vin and -Vin to the transistor connected to the output terminal Tout, the gain when obtaining a multiplication result is set.