Title:
MULTIPLIER
Document Type and Number:
Japanese Patent JP3037004
Kind Code:
B2
Abstract:
PURPOSE: To operate with a low voltage and to give almost the same characteristic as the Gilbert multiplier by applying a voltage which depends on the arithmetic value between the 1st input voltage and the 2nd input voltage accross the bases of 1st and 2nd transistors.
CONSTITUTION: The voltage -1/2V1-V2 is developed across the bases between differential pairs Q1, Q3 and the voltage -1/2V1-V2 is developed across the bases between the differential pairs Q2 and Q4. Accordingly, the input voltage V2 is current-converted by differential pairs Q5 and Q6. Further, it is voltage- converted by transistors Q8 and Q10 of two pairs of differential pairs Q7 and Q8 and Q9 and Q10, and then given to differential pairs Q1 and Q3 and Q2 and Q4 as reverse phase input voltage V2. The in-phase input voltage of differential pairs Ql and Q3 and Q2 and Q4 are 1/2V1 and -1/2V1 so that the differential input voltage to differential pairs Ql and Q3 and Q2 and Q4 are 1/2V1-V2, -1/2V1-V2. Thus, the required differential input voltage can be obtained.
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Inventors:
Katsuji Kimura
Application Number:
JP32825892A
Publication Date:
April 24, 2000
Filing Date:
December 08, 1992
Export Citation:
Assignee:
NEC
International Classes:
G06G7/163; G06G7/164; (IPC1-7): G06G7/163
Domestic Patent References:
| JP57182910U |
Attorney, Agent or Firm:
Yosuke Goto (1 person outside)