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Patent Searching and Data


Title:
MULTIPLIER
Document Type and Number:
Japanese Patent JPH01298431
Kind Code:
A
Abstract:

PURPOSE: To obtain an output digital signal to multiply a desired coefficient to an input digital signal and to delete the total number of gates by selectively switching a multiplication coefficient set by respective switching means by input data.

CONSTITUTION: Input digital signals I1WIm are inputted to a first switching means 100, and the output made A1-fold or B1-fold by a first bit D1 of input data is sent to a next step. A second switching means 101 sends the output made A2-fold or B2-fold by a second bit D2 to a next step and a third switching means 102 sends the output made A3-fold or B3-fold by a third bit D3. Consequently, when the selected coefficient is for example, A1, B2 and A3, A1.A2.A3- fold made output digital signals O1WOm can be obtained. When the coefficient of the switching means is expressed by a general formula, it is expressed by a formula I provided that Xn=the inverse of 2n-1, n=1Wn. Thus, realization can be performed by a small number of gates and since the connection, which becomes a light load, can be executed, and action speed can be hastened.


Inventors:
HASHIRANO MASARU
Application Number:
JP13060588A
Publication Date:
December 01, 1989
Filing Date:
May 27, 1988
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F7/53; G06F7/52; H03H17/02; (IPC1-7): G06F7/52; H03H17/02
Attorney, Agent or Firm:
Toshio Nakao (1 outside)