Title:
積和演算器、ニューロモーフィックデバイスおよび積和演算方法
Document Type and Number:
Japanese Patent JP6977908
Kind Code:
B2
Abstract:
A multiply and accumulate calculation device including a variable resistor array unit having a plurality of variable resistance elements, a reference array unit having a reference resistance element having a fixed resistance value, a signal input unit that generates an input signal from input data, and inputs the input signal to the variable and reference resistance elements, a first detection unit that detects a current flowing through the variable resistor array unit, based on the input signal applied to the variable resistance elements, a second detection unit that detects a current flowing through the reference array unit, based on the input signal applied to the reference resistance element, and a correction calculation unit that performs a predetermined calculation on the output from the first detection unit, based on the output from the second.
Inventors:
Tatsuo Shibata
Temple Saki Yukio
Temple Saki Yukio
Application Number:
JP2021503257A
Publication Date:
December 08, 2021
Filing Date:
March 01, 2019
Export Citation:
Assignee:
tdk Corporation
International Classes:
G06G7/60; G06N3/063; H01L21/822; H01L21/8239; H01L27/04; H01L27/105; H01L29/82
Domestic Patent References:
| JP2018182291A | ||||
| JP2016004589A |
Foreign References:
| WO2018189964A1 |
Attorney, Agent or Firm:
Shu Oikawa
Norihiko Ara
Akihiro Ogino
Hiroyuki Matsumoto
Norihiko Ara
Akihiro Ogino
Hiroyuki Matsumoto
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