To provide a MOS multiplying circuit and MOS OTA which can be formed on a semiconductor integrated circuit.

The circuit is composed of 1st to 4th transistors(TR) which have their sources grounded and are applied with a constant voltage at their gates to operate in linear areas. Here, voltages aV1+bV2, (a-c)V1+bV2, aV1+(b-1/c)V2, and (a-c)V1 +(b-1/c)V2 are applied to the drains of the 1st to 4th TRs, where V1 is a 1st input voltage, V2 is a 2nd input voltage, and (a), (b), and (c) are arbitrary constants. Consequently, the difference current between the sum current of the drain currents of the 1st to 4th TRs and the sum current of the drain currents of the 2nd and 3rd TRs are outputted to allow a current which is proportional to the product of the 1st and 2nd input voltages to flow.