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Patent Searching and Data


Title:
MULTIPROCESSOR ACTIVATING SYSTEM
Document Type and Number:
Japanese Patent JPH02278456
Kind Code:
A
Abstract:

PURPOSE: To prevent the processing ability of each processor from being lowered by making the activation time points of the respective processors mutually different in a multiprocessor system.

CONSTITUTION: Respective processors 100 are respectively activated at every prescribed period. An activation signal generating means 300 supplies activation signals S1-Sn, which activate the respective processors 100, to the respective processors 100 at respectively different time points t1-tn. Thus, since the activation time points are mutually different for the respective processors 100, possibility for the plural processors to simultaneously execute the same processing is decreased and probability to simultaneously try to access the same shared device 200 and to wait for the processing each other is decreased. Further, the processing ability of each processor 100 can be prevented from being lowered as well.


Inventors:
AWAJI TOSHIO
Application Number:
JP10086589A
Publication Date:
November 14, 1990
Filing Date:
April 20, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F15/16; G06F15/177; (IPC1-7): G06F15/16
Attorney, Agent or Firm:
Sadaichi Igita