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Title:
MUTING CIRCUIT
Document Type and Number:
Japanese Patent JPH0492509
Kind Code:
A
Abstract:

PURPOSE: To obtain the analog voice signals of high quality by separating the highest rank bit of each bit train forming the voice digital data and producing the pulses at the rising and falling positions of the most significant bit.

CONSTITUTION: The most significant bit input terminal 71 of a muting circuit 7 is connected to the input terminal of an MSB separator 72. The output of the separator 72 is connected to one of the input terminals of an exclusive OR circuit and then to the input terminal of a NOT circuit 74a of a delay circuit 74. The output of the circuit 74a is connected to one of the terminals of a resistance 74b, and the other terminal of the resistance 74 is connected to one of the electrodes of a capacitor 74c and also to the input terminal of another NOT circuit 74d. The output of the circuit 74d is connected to the other terminal of an EX-OR circuit 73. Thus the voice analog output is obtained with high quality.


Inventors:
CHIKADA MORIYA
Application Number:
JP21091690A
Publication Date:
March 25, 1992
Filing Date:
August 07, 1990
Export Citation:
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Assignee:
SHARP KK
International Classes:
G11B20/10; H03G3/02; H03G3/34; H03M1/08; (IPC1-7): G11B20/10; H03G3/02; H03G3/34; H03M1/08
Domestic Patent References:
JPH0220928A1990-01-24
JPS5728409A1982-02-16
JPS639318A1988-01-16
JPS6066365A1985-04-16
Attorney, Agent or Firm:
Kenzo Hara