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Patent Searching and Data


Title:
MUTING CIRCUIT
Document Type and Number:
Japanese Patent JPH07283654
Kind Code:
A
Abstract:

PURPOSE: To simplify the constitution by outputting a mute signal till charging of a capacitor C, which is connected to transistors TRs A and B which are made conductive for the high level and the low level of an input signal respectively, due to conduction of the TR A and till discharging of the capacitor C due to conduction of the TR B.

CONSTITUTION: When a voltage signal Hi is inputted, a TR Q1 is turned on with the signal Hi as the base current to output the mute signal, and a capacitor C1 is charged through a resistance R1. When the capacitor C1 is charged after a prescribed period, the TR Q1 is turned off not to output the mute signal because the base current doesn't flow. When a voltage signal Lo is inputted, a TR Q2 has the base set to the GND level by a resistance R2 and is turned on by the electric charge charged in the capacitor C1. Then, the charged electric charge of the capacitor C1 is outputted as the mute signal from the TR Q2, and the TR Q2 is turned off after a prescribed period by discharging not to output the mute signal. Thus, the circuit constitution is simplified.


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Inventors:
SUENO HIROSHI
Application Number:
JP9295994A
Publication Date:
October 27, 1995
Filing Date:
April 06, 1994
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H03F1/00; (IPC1-7): H03F1/00