PURPOSE: To obtain a solution with the arithmetic processing of one stage even in multiplication with more than the specified number of terms by accumulating the specified number of differential pair transistor parts, longitudinally connecting them and multiplying the specified number of the items.
CONSTITUTION: In a three terms multiplication circuit, input voltages V1-V3 are pre-processed in preprocessing circuits 34 36 and 38 and are supplied to the first stage differential pair transistor part 28, a second stage differential pair transistor part 30 and a third differential pair transistor part 32. Then, output from the transistor part 32 is post-processed in a post-processing circuit 40 and it becomes output voltage V0. Output voltage V0 is shown by KxV1xV2 xV3 (K: coefficient). In the case of an n-terms multiplication circuit, multiplication is realized by accumulating the n-pieces (n≥3) of the differential pair transistor parts and longitudinally connecting them. In the case of an n-th power arithmetic circuit, multiplication is realized by shorting the input terminals of the n-pieces (n≥3) of the differential pair transistor parts or making the input terminal of the n-pieces of the differential pair transistor parts and the preprocessing circuits to be common.
TODA SHUJI
TSUCHIYA CHIKARA
