FLASH-EPROM MEMORY OF SINGLE METAL LEVEL ERASABLE BY CELL BLOCKS

Title:

FLASH-EPROM MEMORY OF SINGLE METAL LEVEL ERASABLE BY CELL BLOCKS

Document Type and Number:

Japanese Patent JPH0730078

Kind Code:

A

Abstract:

PURPOSE: To provide a flash-EPROM which has single metal line and is separately erasable in respective cell blocks. CONSTITUTION: A source connection line 2 which is parallel with bit lines 2 and divided into a plurality of sections and source interconnecting lines 3, 4, 5 and 6 are included. The respective segments of the source interconnecting lines 3, 4, 5 and 6 are connected to a common source region 9 of unit cells. The electrical continuity between lines belonging to bit lines 1 and the source connection line 2 is realized by an electrical underpath 1p. Erasing is performed individually in the respective groups of the cells of the memory matrix of a flash-EPROM.

Inventors:

BAAJINIA NATARE
JIYANRUKA PETOROSHINO
FURABIIO SUKATSURA

Application Number:

JP33250591A

Publication Date:

January 31, 1995

Filing Date:

November 20, 1991

Export Citation:

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Assignee:

SGS THOMSON MICROELECTRONICS

International Classes:

G11C16/02; G11C16/06; H01L21/8247; H01L27/115; H01L29/788; G11C17/00; H01L29/792; (IPC1-7): H01L27/115; G11C16/06; H01L21/8247; H01L29/788; H01L29/792

Attorney, Agent or Firm:

Hiroyuki Mori

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