Title:
ORTHOGONAL TRANSFORMER
Document Type and Number:
Japanese Patent JP3013580
Kind Code:
B2
Abstract:
PURPOSE: To reduce the hardware scale of orthogonal transformation by using a multiplier while sharing time concerning the orthogonal transformer used as a preprocessing or post-processing for the high-efficiency encoding of image signals.
CONSTITUTION: At the orthogonal transformer to execute 8-point cosine transformation, when any special high-speed algorithm is used, a multiplier excepting for the square of 2 is eight. Therefore, a multiplier 32 to enable one time of multiplication with one sample is time-multiplexed, and the product is inputted to a butterfly computing element 7, butterfly computing element 12 or rearranger 14. The 8-point cosine transformation can be executed with one multiplier having large hardware scale, and the hardware scale of the orthogonal transformer is reduced as well.
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Inventors:
Shinya Sumino
Tatsuro Shigesato
Hiroshi Horigane
Masakazu Nishino
Day Day Gan
Tatsuro Shigesato
Hiroshi Horigane
Masakazu Nishino
Day Day Gan
Application Number:
JP2876292A
Publication Date:
February 28, 2000
Filing Date:
February 17, 1992
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H04N1/41; G06F17/10; G06F17/14; G06T1/00; G06T1/20; G06T9/00; H04N19/42; H04N19/423; H04N19/60; H04N19/625; (IPC1-7): G06F17/14; G06F17/10; G06T1/00; G06T9/00; H04N1/41; H04N7/30
Domestic Patent References:
| JP335353A |
Other References:
【文献】米国特許4831574(US,A)
【文献】欧州特許出願公開366435(EP,A2)
【文献】電子情報通信学会全国大会講演論文集 Vol.1991,NO.Spring Pt7 Page.7.41 1991
【文献】欧州特許出願公開366435(EP,A2)
【文献】電子情報通信学会全国大会講演論文集 Vol.1991,NO.Spring Pt7 Page.7.41 1991
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)