Title:
【発明の名称】双方向バッファ回路
Document Type and Number:
Japanese Patent JP3084856
Kind Code:
B2
Abstract:
PURPOSE:To prevent noise at changeover of the input/output mode from being propagated to an input buffer by providing a data selection circuit having 1st and 2nd input terminals between a 3-state output buffer circuit and the input buffer circuit. CONSTITUTION:When an output control terminal 6 of a 3-state output buffer circuit 1 and a data selection input terminal 11 of a data selection circuit 7 go to a high level, a level at an output terminal 10 of the circuit 7 changes to the same L level as a level fed to the 2nd input terminal 9, that is, the input terminal 5 of the buffer 1. Thus, even when a bi-directional buffer input/output terminal 3 goes to a high impedance state or noise or the like takes place at the terminal 3 due to a deviation of the timing between an output signal of the buffer 1 and a signal applied externally to an integrated circuit after the change, no effect is given to the output signal of the circuit 7 and the output signal of the input buffer circuit 2.
Inventors:
Hideki Matsuura
Application Number:
JP30939491A
Publication Date:
September 04, 2000
Filing Date:
November 25, 1991
Export Citation:
Assignee:
NEC
International Classes:
H03K17/16; H03K17/693; H03K19/003; H03K19/0175; (IPC1-7): H03K19/0175
Attorney, Agent or Firm:
Naotaka Ide