Title:
EMULATION CHIP
Document Type and Number:
Japanese Patent JPH0612504
Kind Code:
A
Abstract:
PURPOSE: To prevent event detection and real time trace from being performed during real time OS program execution.
CONSTITUTION: The chip select of an event detector 5 and a real time tracer 6 is enabled by using an event trace enable signal SIT which is the logical product of a real time OS operation signal SOO, which is made active by writing '1' in a real time OS operation flag 2 and made inactive by writing '0', and a supervisor mode signal SSM.
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Inventors:
ISHII YASUNORI
Application Number:
JP1152192A
Publication Date:
January 21, 1994
Filing Date:
January 27, 1992
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F11/22; G06F15/78; (IPC1-7): G06F15/78; G06F11/22
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)
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