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Patent Searching and Data


Title:
MANUFACTURE OF INTEGRATED CIRCUIT SUBSTRATE
Document Type and Number:
Japanese Patent JPH0582764
Kind Code:
A
Abstract:

PURPOSE: To realize a high integration by reducing the area occupied in a separation region between elements for an integrated circuit substrate having SOI structure.

CONSTITUTION: A semiconductor substrate 1 is formed to a construction having one surface etched and arranged with a recess portion 2 and projected portion 3 alternately, a flat insulation layer 4 covering these recess portions and projected portions is formed, and the semiconductor substrate 1 is connected to a support substrate 7 through the insulation layer 4. The rear face of the semiconductor substrate 1 selectively etched so that regions corresponding to said recess portion 2 and projected portion 3 will have predetermined thickness. By doing this, a level difference is given to a semiconductor layer 1A on the insulation layer from an adjacent element region, by which elements are separated.


Inventors:
ANZAI HIROMI
Application Number:
JP23903291A
Publication Date:
April 02, 1993
Filing Date:
September 19, 1991
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L27/12; H01L21/02; (IPC1-7): H01L27/12
Attorney, Agent or Firm:
Teiichi