Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
HERMETICALLY SEALED SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0653359
Kind Code:
A
Abstract:

PURPOSE: To eliminate short-circuit between leads due to dust generated within a cavity and erasing failure or the like of EPROM by providing, in order to form an ultraviolet transmitting window, a transparent resin layer in which a structure material in the cavity including a mount material and a chip or the like is buried.

CONSTITUTION: A base 9 and a chip 2 formed by a mount material 4 loaded at the bottom part of a cavity 1 of the base 9 are comprised. A lead 8 which is sealed to the base 9 with a sealing glass 10 and extended to the outside and a bonding wire 5 connecting the lead 8 and the chip 2 are also provided. Moreover, a transparent resin layer 3 in which a structure in the cavity 1 including mount material 4, chip 2, bonding wire 5 and lead 8 is buried is provided to form an ultraviolet transmitting window 7. Thereby, generation of dust particularly from the mount material 4 and generation of short-circuit between leads 8 can be prevented and looseness of wire 5 due to mechanical stress such as vibration or the like and wire opening can also be prevented.


Inventors:
NAKAYAMA MASAKATSU
Application Number:
JP20282192A
Publication Date:
February 25, 1994
Filing Date:
July 30, 1992
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
International Classes:
H01L23/28; (IPC1-7): H01L23/28
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)