To provide a network apparatus which eliminates a bottle neck in packet receiving processing between a processor and a network interface device, thus enabling high-speed packet processing.

The network apparatus is provided with a multiprocessor 6 which has a plurality of CPUs 6a to 6d and is loaded with a multiprocessor-adaptive OS 7 on a shared memory space and an interface card (network interface device) 2 for connecting the multiprocessor 6 with an external network apparatus. The OS 7 allocates packet receiving processing from the card 2 to a specific CPU 6a out of the plurality of CPUs 6a to 6d and allocates processing other than the packet receiving processing to the other CPUs 6b to 6d and only the CPU 6a to which the packet receiving processing has been allocated monitors packet arrival from the card 2 by polling.