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Patent Searching and Data


Title:
NETWORK SYNCHRONIZING METHOD FOR LOOP NETWORK
Document Type and Number:
Japanese Patent JPH03286643
Kind Code:
A
Abstract:

PURPOSE: To warrant synchronization of a terminal equipment by using a phase locked loop for a sub clock source and making the frequency and the phase of a network synchronization clock recovered and extracted at a reception section and a clock of the sub clock source coincident with each other.

CONSTITUTION: A fault takes place in a transmission line 2 and a fault takes in the extraction and recovery of a clock from a reception signal, then a transmission line fault detection section 8 detects the fault, its output select switches 9a-9c, a clock 14 phase-locked to a clock 4 in word synchronization and a clock 15 in phase-locked to a clock 5 synchronously with a frame are outputted from a PLL 13 and the clocks are inputted to a node control section. Moreover, the clock 14 in phase-locked to the clock 4 synchronously with a word is inputted to a transmission section 6. Since a frequency of a sub clock source is coincident with a frequency of a network synchronization clock by the PLL 13, the sub clock source is phase locked to the network synchronization clock.


Inventors:
MUSA MUTSUMI
MIWA MAKOTO
Application Number:
JP8854990A
Publication Date:
December 17, 1991
Filing Date:
April 03, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04L7/00; H04L12/42; (IPC1-7): H04L7/00; H04L12/42
Attorney, Agent or Firm:
Yoshihiro Morimoto