PURPOSE: To execute neural network operation at a high speed by connecting all neurons and a control part through a bus and mutually connecting adjacent neurons through inter-neuron buses in a mesh to execute communication.
CONSTITUTION: This neurocomputer is provided with a neuron array part 101 arranging plural neurons 106 like an array, a control part 102 for controlling the learning of the array part 101 and all of the neurons 106 and the control part 102 are connected through an out-of-neuron bus 103 constituted of an instruction bus, an address bus, a neuron input bus, a neuron output bus, etc., Plural neurons 106 are mutually connected through inter-neuron buses 104 in a mesh and communication is executed between adjacent neurons. In the case of a highly accurate cumulative addition operation, partial products of a product to be found out are allocated to plural neurons 106 and obtained partial products are transferred through the bus 104, so that a product of double precision can be found out at a high speed.
SAGARA KAZUHIKO
OGATA HISAO
OKI MASARU
HITACHI VLSI ENG