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Title:
窒化物半導体ウェーハ、窒化物半導体装置及び窒化物半導体結晶の成長方法
Document Type and Number:
Japanese Patent JP5117609
Kind Code:
B1
Abstract:
According to one embodiment, a nitride semiconductor wafer includes a silicon substrate, a lower strain relaxation layer provided on the silicon substrate, an intermediate layer provided on the lower strain relaxation layer, an upper strain relaxation layer provided on the intermediate layer, and a functional layer provided on the upper strain relaxation layer. The intermediate layer includes a first lower layer, a first doped layer provided on the first lower layer, and a first upper layer provided on the first doped layer. The first doped layer has a lattice constant larger than or equal to that of the first lower layer and contains an impurity of 1×1018 cm−3 or more and less than 1×1021 cm−3. The first upper layer has a lattice constant larger than or equal to that of the first doped layer and larger than that of the first lower layer.

Inventors:
Hong Hong
Tomoya Shiota
Yellow bell day
Naoji Sugiyama
Shinya Nunogami
Application Number:
JP2011224367A
Publication Date:
January 16, 2013
Filing Date:
October 11, 2011
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
H01L21/205; C30B29/38; H01L21/338; H01L29/778; H01L29/812; H01L31/10; H01L33/32
Domestic Patent References:
JP2000277441A
JP9116130A
JP2010232293A
JP2003234502A
JP2004296717A
JP2011023642A
JP2006332125A
JP2012033575A
Foreign References:
WO2009001888A1
Attorney, Agent or Firm:
Masahiko Hinataji