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Title:
NOISE REDUCING CIRCUIT
Document Type and Number:
Japanese Patent JPH01268265
Kind Code:
A
Abstract:
PURPOSE:To more exactly extract and reduce a noise by using two negative feedback loops to be operated in separate areas. CONSTITUTION:The first negative feedback loop is composed of a subtracter 4, a delay circuit 11, a subtracter 5, a band erase filter 13, an amplitude limiter 15 and an adder 9. The second negative feedback loop is composed of the subtracter 4, delay circuits 11 and 12, a subtracter 6, a band pass filter 14, an amplitude limiter 16 and the adder 9. Then, a noise reducing circuit is composed of these two non-linear negative feedback loops. These both negative feedback loops shares noise reducing operation in the areas, in which time space frequencies are mutually different. Thus, sensitivity is improved to the noise, which exists in the interval of a video signal, in the time space frequency area and the noise can be exactly extracted and reduced.

Inventors:
TAKAGUCHI TATSUSHI
ITO SHIGEHIRO
Application Number:
JP9452688A
Publication Date:
October 25, 1989
Filing Date:
April 19, 1988
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N5/21; H04N9/64; (IPC1-7): H04N5/21; H04N9/64



 
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