To provide a non-volatile semiconductor memory in which tests of peripheral circuits of a memory and wiring can be performed without performing write-in for a memory cell.
In the non-volatile semiconductor memory, control gates of a memory cell arranged in the same row in a memory cell array are connected in common first word lines connected to a row decoder and drains of a memory cell arranged in the same column in the memory cell array are connected in common, and first bit lines connected to a column selection gate is included, the non-volatile semiconductor memory is provided with a first switch arranged between the memory cell array and a first ROM and a second switch arranged between the memory cell array and a second ROM, and in testing, the first and the second switches are controlled so that data can be read out from the first ROM and the second ROM.
JP3676857 | FLASH MEMORY |
JP5366885 | Electronic control device |