NON-VOLATILE SEMICONDUCTOR MEMORY

Japanese Patent JP3810985

B2

PROBLEM TO BE SOLVED: To prevent reduction in a write-in prohibition potential caused by leak. SOLUTION: A drain side select-gate line SGD is set to VSG1 (>VDD) which can sufficiently transfer VDD (time t1). At this time, as all word lines in a selection block are Vread, VDD is transferred to channels of all memory cells in a cell unit. After that, the drain side select-gate line SGD is set to VSG2, and a write-in potential Vpgm is applied to a selection word line (time t2-t3). As VSG is sufficiently small, drain side select-gate transistors are all in an off-state, and channels of memory cells in all cell units are boosted. After that, the drain side select-gate line SGD is set to VSG3, 0 V is transferred to only a channel of a selection memory cell (time t4).