Title:
不揮発性半導体記憶装置
Document Type and Number:
Japanese Patent JP5275052
Kind Code:
B2
Abstract:
A non-volatile semiconductor storage device includes: a memory string including a plurality of memory cells connected in series; a first selection transistor having one end connected to one end of the memory string; a first wiring having one end connected to the other end of the first selection transistor; a second wiring connected to a gate of the first selection transistor. A control circuit is configured to boost voltages of the second wiring and the first wiring in the erase operation, while keeping the voltage of the first wiring greater than the voltage of the second wiring by a certain potential difference. The certain potential difference is a potential difference that causes a GIDL current.
Inventors:
Seitaro Itagaki
Yoshihisa Iwata
Kito Jie
Ryuta Katsumata
Hideaki Aochi
Nitayama Akihiro
Kito Dai
Kei'an Tanaka
Takashi Maeda
Tomohishida
Yoshihisa Iwata
Kito Jie
Ryuta Katsumata
Hideaki Aochi
Nitayama Akihiro
Kito Dai
Kei'an Tanaka
Takashi Maeda
Tomohishida
Application Number:
JP2009002376A
Publication Date:
August 28, 2013
Filing Date:
January 08, 2009
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/8247; G11C16/02; G11C16/04; H01L21/336; H01L27/10; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP2008171968A | ||||
| JP2008172164A | ||||
| JP2007317874A | ||||
| JP2004165553A | ||||
| JP2000182383A | ||||
| JP2001035177A | ||||
| JP2007523501A |
Attorney, Agent or Firm:
Kisaragi International Patent Business Corporation