To prevent degradation in characteristics of a first insulating film and to improve degree of integration of a memory cell.
A first insulating film 700, a floating gate 340, a second insulating film 350 and a control gate 360 are formed in sequence on a semiconductor substrate 300. A drain area 310, a low-density doped source area 602 and a high-density doped source area 600 are formed on the surface of the semiconductor substrate 300. In this case, the high-density doped source area 600 is thinner than the drain area 310 and the floating gate 340 is not overlaid on it. In this way, the degree of integration of a memory cell can be improved and characteristics of the memory cell can be improved by reducing electrons captured in the insulating film 700 formed between the floating gate 340 and the low-density doped source area 602.
KIM JONG-HAN
JP2001291784A | 2001-10-19 | |||
JPH02246375A | 1990-10-02 | |||
JPH0794609A | 1995-04-07 | |||
JPS6124282A | 1986-02-01 | |||
JPH06177399A | 1994-06-24 | |||
JPH01233773A | 1989-09-19 | |||
JPH02129968A | 1990-05-18 | |||
JP2001291784A | 2001-10-19 | |||
JPH02246375A | 1990-10-02 | |||
JPH0794609A | 1995-04-07 | |||
JPS6124282A | 1986-02-01 | |||
JPH06177399A | 1994-06-24 | |||
JPH01233773A | 1989-09-19 | |||
JPH02129968A | 1990-05-18 |
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