PURPOSE: To enable a memory cell to be composed of only one transistor, by providing a first voltage switching means which allows any one of four kinds of voltages to be applied to each column word wire, a second voltage switching means which allows any one of three kinds of voltages to be applied to each row bit wire, and a third voltage switching means which allows two kinds of voltages to be applied to each common surface wire.

CONSTITUTION: A first voltage switching means 3 which allows any one or grounding potential, first voltage, second voltage, or a third voltage to be applied to each column word lines W1∼Wn of a memory cell array, a second voltage switching means 4 which allows any one of grounding potential, a first potential, or a third voltage to be applied to each row bit wire B1∼Bn, and a voltage switching means 5 which allows grounding potential or a second voltage to be applied to each common source wire CS1∼CSn are provided. And the relationship of each voltage is first voltage < second voltage < third voltage. It allows a memory cell to be constituted by only one memory transistor.