To provide a nonvolatile memory element for solving various problems of the conventional technologies.
The nonvolatile memory element comprises a memory cell and a high-voltage MOS transistor. The memory cell is provided in a memory array region, and comprises a PMOS access transistor and a PMOS storage transistor connected in series to the access transistor via a floating and common p-type doped region. The PMOS access transistor comprises an access gate, an access gate oxide film, and a p-type source doped region used for its drain. The PMOS storage transistor comprises a control gate, a charge storing structure, and a p-type drain doped region used for its source. The high-voltage MOS transistor is provided in a peripheral circuit region and comprises a high-voltage gate and a high-voltage gate oxide film, having thickness matching that of the access gate oxide film.
LEE HAI-MING
CHIN SHIKETSU
JO SEISHO
Shinsuke Onuki
Tadashige Ito
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