Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
NONVOLATILE RAM
Document Type and Number:
Japanese Patent JPS62298998
Kind Code:
A
Abstract:

PURPOSE: To increase a nonvolatile memory area without increasing greatly the chip area of an integrated circuit by connecting at least two nonvolatile memory elements or above through a selecting switch to one CMOS static RAM.

CONSTITUTION: Two EEPROMs or above are connected to one SRAM through a switch controlled by a selecting circuit and the exchange of the data between the SRAM and the EEPROM is executed between selected memory cells. For example, a switch 3 is connected to the contact (q) of an SRAM 1, plural EEPROMs 2 are connected through the switch 3 and for the switch 3, conducting and nonconducting are controlled by a selecting circuit 4. Usually, the switch 3 comes to be all nonconducting, and the writing and reading to the SRAM 1 can be freely executed. When the information of the SRAM 1 is made nonvolatile, first, an optional switch 3 comes to be the conducting condition by the selecting circuit 4 and from an EEPROM writing and reading signal generating circuit 5, the writing signal is supplied only to the selected EEPROM.


Inventors:
MACHIDA TORU
Application Number:
JP14223086A
Publication Date:
December 26, 1987
Filing Date:
June 18, 1986
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SEIKO INSTR & ELECTRONICS
International Classes:
G11C14/00; G11C11/40; (IPC1-7): G11C11/40
Attorney, Agent or Firm:
Top affairs