Title:
不揮発性半導体記憶装置
Document Type and Number:
Japanese Patent JP5595901
Kind Code:
B2
Abstract:
During data read process, a control circuit gives a read voltage to a selected word line connected to a selected memory cell, and gives read pass voltages, for turning on memory cells, to unselected word lines connected to unselected memory cells. The control circuit respectively gives a first read pass voltage, a second read pass voltage, and a third read pass voltage to a first unselected word line adjacent to the selected word line at a side of at least one of a bit line and a source line, a second unselected word line adjacent to the first unselected word line at a side opposite to the selected word line, and a third unselected word line adjacent to the second unselected word line at a side opposite to the selected word line. The second read pass voltage is higher than the third read pass voltage.
Inventors:
Two mountains Takuya
Takeshi Kamigaichi
Takeshi Kamigaichi
Application Number:
JP2010291948A
Publication Date:
September 24, 2014
Filing Date:
December 28, 2010
Export Citation:
Assignee:
Toshiba Corp.
International Classes:
G11C16/06; G11C16/02; G11C16/04
Attorney, Agent or Firm:
きさらぎ international patent business corporation