NORMALIZING CIRCUIT OF BINARY-CODED DECIMAL NUMBER

Title:

NORMALIZING CIRCUIT OF BINARY-CODED DECIMAL NUMBER

Document Type and Number:

Japanese Patent JPS6083139

Kind Code:

A

Abstract:

PURPOSE: To attain a high-speed operation of a normalizing circuit of binary- coded decimal number by shifting the input data after detecting "1" that is most approximate to the most significant bit of the input data.

CONSTITUTION: A preceding "1" detecting circuit 1 uses the data X of mantissa part as an input and detects "1" most approximate to the most significant bit MSB including this MSB and informs this detection information to an encoder 2. The encoder 2 converts the number of shifts into a code of binary display to perform normalization according to the received information. A shifter 3 obtains the input of the data X and shifts the data X according to the shift information which is coded by the encoder 2 to produce the nomalization data Y. This circuit ensures a normalizing action at a high speed.

More Like This:

WO/2001/061933	APPARATUS AND METHOD FOR CONVERTING A NETWORK MESSAGE TO A WIRELESS TRANSPORT MESSAGE USING A MODULAR ARCHITECTURE
WO/2011/133403	PERSONALIZING A WEB PAGE OUTSIDE OF A SOCIAL NETWORKING SYSTEM WITH CONTENT FROM THE SOCIAL NETWORKING SYSTEM

Inventors:

KUWATA AKIRA
TAKAHASHI TOSHIYA

Application Number:

JP19148983A

Publication Date:

May 11, 1985

Filing Date:

October 13, 1983

Export Citation:

Click for automatic bibliography generation Help