OBJECT AREA ENCODING DEVICE - Daewoo Electronics Corporation

Title:

OBJECT AREA ENCODING DEVICE

Document Type and Number:

Japanese Patent JP3833744

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To reduce the quantity of data to be encoded by generating a least arrangement processing block where the number of sub-blocks surrounding an object area becomes min. and position information which expresses the position of the least arrangement block.
SOLUTION: A processing block deciding circuit 200 decides a processing block through the use of a video frame signal masked by 0 and shape information. The processing block includes plural same-sized sub-blocks adding the object area, for example, a P×Q sub-block (P and Q are positive integers) and the processing block signal expressing the processing block and processing block position information expressing the position of the processing block are generated. Then, the sub-block of processing sub-block is rearranged in a sub- block rearrangement circuit 300 and a rearrangement processing block signal and a rearrangement processing block signal and rearrangement sub-block array positioin information are generated. Moreover, a conversion encoding circuit 400 processes the rearrangement processing block which is outputted from a selector 340 and supplies a group of conversion coefficients to a succeeding processor.

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Inventors:

Kim Jin-ken

Application Number:

JP19276596A

Publication Date:

October 18, 2006

Filing Date:

July 04, 1996

Export Citation:

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Assignee:

Daewoo Electronics Corporation

International Classes:

H04N19/60; G06T9/00; H04N1/41; H04N19/119; H04N19/136; H04N19/14; H04N19/176; H04N19/196; H04N19/20; H04N19/21; H04N19/423; H04N19/625; H04N19/85; (IPC1-7): H04N7/30; H04N1/41

Domestic Patent References:

JP9510859A

Foreign References:

EP0711078A1

Attorney, Agent or Firm:

Yoichi Oshima

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