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Patent Searching and Data


Title:
OFFSET COMPENSATION CIRCUIT FOR DIGITAL DEMODULATOR
Document Type and Number:
Japanese Patent JPH08130568
Kind Code:
A
Abstract:

PURPOSE: To always compensate an offset value even if distortion occurs in a reception base band signal by generating offset voltage based on the average value of specified data which an A/D-converter outputs and adding it to a demodulation signal.

CONSTITUTION: A digital demodulator receives a prescribed digital modulation wave, synchronously detects it, converts the demodulation signal which is thus obtained into a digital signal by the A/D-converter at every same phase and every orthogonal phase so as to identify it and reproduces demodulation data by logic-processing the identified data. The addition circuits 31a and 31b of an offset compensation circuit to which identification data outputted from the A/D converter is inputted mutually adds data becoming symmetric in an amplitude direction with a phase axis as a center among the identified data, convert data into an analog signal by D/A converters 33a and 33b, and they are integrated by DC amplifiers with loop filters 34a and 34b. The output is fed back to the adder of a demodulator as offset voltage and it is added to the reception base band signal.


Inventors:
MIZUNO SUMITAKA
OYA YASUNORI
Application Number:
JP26970994A
Publication Date:
May 21, 1996
Filing Date:
November 02, 1994
Export Citation:
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Assignee:
TOSHIBA CORP
TOSHIBA TSUSHIN SYST ENG
International Classes:
H04L27/38; H04L27/22; (IPC1-7): H04L27/38; H04L27/22
Attorney, Agent or Firm:
Takehiko Suzue