Title:
論理装置の動作シミュレーション方法並びに論理装置の動作シミュレーションプログラム及び同プログラムを記録したコンピュータ読み取り可能な記録媒体
Document Type and Number:
Japanese Patent JP4088439
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To perform function confirmation and architecture evaluation by performing operation simulation in the initial stage of logical unit design and also to flexibly correspond even to architecture change with minimum description change. SOLUTION: A resource manager 12 allocates necessary hardware resource 14 for performance of a thread 13 where a thread manager 11 represents a needed function by the operation completion of a logical unit, in response to the request, the thread manger 11 further controls the performance state of the thread 13 in accordance with the allocation results, the thread manager 11 and the resource manager 12 also work together to repeatedly perform a resource request, resource allocation and thread control until the performance of the thread 13 is completed, and thereby, operation up to the operation completion of the logical unit is simulated.
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Inventors:
Akio Matsuda
Zhu Qiang
Kazuhiro Matsuzaki
Takeshi Doi
Zhu Qiang
Kazuhiro Matsuzaki
Takeshi Doi
Application Number:
JP2001387198A
Publication Date:
May 21, 2008
Filing Date:
December 20, 2001
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F17/50; G06F9/46; G06F9/52
Domestic Patent References:
| JP10340251A | ||||
| JP2000311186A | ||||
| JP2002540505A |
Foreign References:
| WO2000057297A1 |
Attorney, Agent or Firm:
Yu Sanada