OPERATIONAL AMPLIFIER CIRCUIT - Toshiba Corporation

Title:

OPERATIONAL AMPLIFIER CIRCUIT

Document Type and Number:

Japanese Patent JP3387974

Kind Code:

B2

Abstract:

PURPOSE: To share a circuit between the case that the output is set to 0 at the time of input zero and the case that a prescribed bias is outputted to the output at this time with respect to the input/output characteristic of the operational amplifier circuit.
CONSTITUTION: A summing amplifier circuit 1 which takes an input voltage A and a level controlled DC voltage B as the input to output an output voltage C, a resistance 3 to which a prescribed positive DC voltage D is supplied through a resistance 2 and which divides the voltage supplied through this resistance 2 in a prescribed ratio based on a prescribed negative DC voltage E, a variable resistance 4, a comparator 6 which compares the divided voltage with a reference voltage 5, and a transistor TR 8 which is connected to the output terminal of the comparator 6 through a resistance 7 are provided, and the voltage supplied through the resistance 2 is controlled by the TR 8 so as to be the level controlled DC voltage B.

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Inventors:

Toshio Tanaka

Application Number:

JP16494493A

Publication Date:

March 17, 2003

Filing Date:

July 05, 1993

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