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Patent Searching and Data


Title:
OPTOELECTRONIC INTEGRATED CIRCUIT AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH01297877
Kind Code:
A
Abstract:

PURPOSE: To prevent increasing an area of a graft base diffusion layer and to realize operation of light emitting element at a very fast speed by allowing a graft base region of a hetero junction bi-polar transistor(Tr) which drives the light emitting element such as a semiconductor laser device, to reach a semiconductor substrate through one-conductivity clad layer.

CONSTITUTION: An n-type InP layer 102 is formed on a semi-insulating InP substrate 101 as a clad layer. An InGaAsP active layer 103 whose band gas is smaller than that of the layer 102 and a p-type InGaAsP optical wave guide layer 104 are formed on the layer 102. Furthermore, an n-type InP emitter layer 105 and an n-type InGaAsP emitter contact layer 106 whose band gap is larger than that of the layer 104 are partially formed on the surface of the layer 104. The layers 106, 105 are etched using an Si3N4 film 107 as a mask, and diffusion is applied using ZnP reaching the substrate 101 as a diffusion source to form a p-type InP graft base region 108. Increasing of an area of the graft base diffusion layer can be thereby avoided, thus allowing a light emitting element to operate at a very fast speed.


Inventors:
ONAKA SEIJI
TSUJII HIRAAKI
SHIBATA ATSUSHI
Application Number:
JP12891288A
Publication Date:
November 30, 1989
Filing Date:
May 26, 1988
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L27/15; H01S5/00; H01S5/026; (IPC1-7): H01L27/15; H01S3/18
Attorney, Agent or Firm:
Toshio Nakao (1 outside)