Title:
【発明の名称】半導体記憶装置の製造方法
Document Type and Number:
Japanese Patent JP2652985
Kind Code:
B2
Abstract:
PURPOSE:To increase capacity by forming a polycrystalline silicon film, interlayer oxide film, and polycrystalline silicon film in the channel formed on the interlayer oxide film and then etching and removing the latter two films, while forming a U-shaped capacity electrode of the first film. CONSTITUTION:An interlayer oxide film 6 is formed on a semiconductor substrate 1 to a certain height and in the place for this layer's electrode, a channel 7 is formed which exposes the surface of the semiconductor substrate 1. After that, a polycrystalline silicon film 8 is formed over the entire region including the channel 7, an interlayer oxide film 9 is formed on this surface, and a polycrystalline silicon film 10 is formed to fill the recess portion created in the polycrystalline silicon film 8. The polycrystalline silicon film 10, interlayer oxide film 9, and polycrystalline silicon film are then etched back and only left in the channel on interlayer oxide film 6. After the polycrystalline silicon film 10 and interlayer oxide film 9 remaining in the channel are selectively etched, the interlayer oxide film 6 is removed. The resulting capacity electrode 8A is U-shaped and since the electrode area is large compared to the occupied surface area capacity can be increased.
Inventors:
AKIMOTO KENJI
Application Number:
JP29395990A
Publication Date:
September 10, 1997
Filing Date:
October 31, 1990
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H01L21/28; H01L21/822; H01L21/8242; H01L27/04; H01L27/10; H01L27/108; (IPC1-7): H01L27/108; H01L21/28; H01L21/822; H01L21/8242; H01L27/04
Domestic Patent References:
| JP62286270A |
Attorney, Agent or Firm:
Suzuki Akio