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Patent Searching and Data


Title:
PACKAGNING SUBSTRATE
Document Type and Number:
Japanese Patent JPH07307434
Kind Code:
A
Abstract:

PURPOSE: To accelerate the signal transmission of plural LSI packaged in high density by a method wherein the LSI are formed so as to electrically connect the memory LSI and the logic LSI through the intermediary of outer terminals.

CONSTITUTION: A logic LSI 4 and memory LSI 5, 6 are buried in counter sunk parts 2 in a ceramic substrate 3 having an inner layer circuit 1, for wiring the counter-sunk parts 2 so as to pelletize the logic and memory LSI 4-6 on the ceramic substrate 3. Next, a wiring sheet 9 whereon the signal circuits of the memories LSI 4-6 are formed is set in the space between the surface circuit of the ceramic substrate 3 and the external outer terminal 8 using a heated and pressure fixed thermal resistant sheet 11. Through these procedures, the module substrate for rapid processor for a larger general purpose computer or work station can be packaged in high density.


Inventors:
MIURA OSAMU
TAKAHASHI AKIO
MIWA TAKAO
SUZUKI MASAHIRO
WATANABE RYUJI
AKABOSHI HARUO
KATAGIRI JUNICHI
IMAI TSUTOMU
TAIKO YOICHI
Application Number:
JP5853095A
Publication Date:
November 21, 1995
Filing Date:
March 17, 1995
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L23/12; H01L23/522; H01L23/538; (IPC1-7): H01L23/522; H01L23/12
Attorney, Agent or Firm:
Ogawa Katsuo