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Patent Searching and Data


Title:
PARALLEL DATA TEST METHOD
Document Type and Number:
Japanese Patent JPH03175770
Kind Code:
A
Abstract:

PURPOSE: To reduce the processing time required for the check by providing a check function as to a transferred data to a 2nd program processing unit such as each line adaptor section so as to relieve the check load as to the transferred data from a 1st program processing unit such as a main controller.

CONSTITUTION: A main controller 200 writes the order for program start to the control register of a lie processing section 220 under the control of a main controller 200 after the transfer of a transfer program to a line adaptor section 260i and the execution of a transfer data test program transferred already to the line adaptor section 2601 is started by the line adaptor section 2601. When the execution of the transfer data test program is started in the line adaptor section 2601, a start reply is transferred to a main controller 200 via a line processing section 220. The main controller 200 obtaining the start confirmation of the transfer data test program by the normal start reply reception reads the data for the transfer test from a display device 340 to the main storage device 300 via a channel controller 2m.


Inventors:
YAMASHITA YURIKO
TAKITA MASATOSHI
Application Number:
JP31487889A
Publication Date:
July 30, 1991
Filing Date:
December 04, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/00; H04M3/26; (IPC1-7): G06F11/00; H04M3/26
Domestic Patent References:
JPS63305652A1988-12-13
Attorney, Agent or Firm:
Furuya Fumio



 
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