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Patent Searching and Data


Title:
PARALLEL REDUNDANT CIRCUIT
Document Type and Number:
Japanese Patent JPH0651801
Kind Code:
A
Abstract:

PURPOSE: To perform simultaneous control having no shift while holding the reliability of the parallel redundant circuit even when any fault is generated at one crystal oscillators by driving two control units while providing the crystal oscillators at the same oscillation frequency in the respective control units.

CONSTITUTION: Two arithmetic and control units 1 and 2 synchronously perform parallel control by using crystal oscillators 3 and 4 at the same oscillation frequency provided in the respective units and in the respective arithmetic and control units 1 and 2, however, synchronizing signal generating means 1a and 2a provided in the respective units mutually generate synchronizing signals. When respectively provided synchronizing input means 1b and 2b mutually input these synchronizing signals, the two control units 1 and 2 are synchronized and with this synchronization of both of arithmetic and control units 1 and 2, timer value preset means 1c and 2c preset the timer value of a control loop. Thus, even when the timer value of the control loop is shifted, the shift is canceled and is not accumulated so as to perform the simultaneous control.


Inventors:
KIZAKI KATSUTOSHI
Application Number:
JP17894991A
Publication Date:
February 25, 1994
Filing Date:
June 25, 1991
Export Citation:
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Assignee:
NIPPON DENKI HOME ELECTRONICS
International Classes:
G05B9/03; (IPC1-7): G05B9/03
Attorney, Agent or Firm:
Takeshi Kubotani