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Patent Searching and Data


Title:
PATTERN VIDEO SIGNAL GENERATOR CIRCUIT
Document Type and Number:
Japanese Patent JPS5457916
Kind Code:
A
Abstract:

PURPOSE: To simplify a circuit constitution with performing the pattern display such as a cursor frame and continuous ruled lines without using ROM by controlling a shift register with a logical operation circuit.

CONSTITUTION: Information indicating left, upper, lower and right ruled line display is successively inputted to terminals E1 to E4 of control circuit 2 as ruled line information from a refresh memory; and for example, when information is inputted to only terminal E1, parallel input terminals A, B and C of parallel-series conversion register 1 become L-level and D becomes H-level. Each information set in register 1 is shifted by two shift clock pulses before and after a one-character time, and left ruled line video signals are obtained as the series output at terminal QD. Similarly, upper, lower and right ruled line video signals are obtained; and in case of upper and lower ruled line indication, scanning line information RCO and RC13 are given as the control input simultaneously


Inventors:
SHIMODA YASUHIDE
Application Number:
JP12471877A
Publication Date:
May 10, 1979
Filing Date:
October 18, 1977
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F3/14; G09G5/08; G09G5/32; H04N5/00; (IPC1-7): G06F3/14; G06K15/20; H04N5/00