To realize a phase difference signal generating circuit that eliminates the need for a frequency divider, has small circuit scale and can easily be configured with an electronic circuit.

Delay circuit 11a, 11b both delay a phase of input clock signals by x-degrees. A phase interpolation circuit 12 outputs a clock signal with an intermediate phase of those of the two input clock signals. The phase difference signal generating circuit receiving the input signal 13 outputs a signal 15 with a phase of x-degrees and converts the signal 15 into a signal 16 with a phase of 2x-degrees. The phase interpolation circuit 12 receives the signal 16, 14 and outputs a signal 17. The phase difference between the signals 17 and 15 is θ/2- degrees independently of the value (x). That is, even when the phase difference signal generating circuit receives the clock signals whose phase difference is θ-degrees, since the delay (x) given to the delay circuits 11a, 11b is the same even if the delay (x) is fluctuated, the clock signals with a constant phase difference of θ/2 can be obtained at the outputs.