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Title:
PHASE SHIFTER AND MULTI-BIT PHASE SHIFTER
Document Type and Number:
Japanese Patent JP3469563
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To solve the problem of losses increasing, when the gate width of a 'pinched-off' FET 2a is narrowed, because the gate width must be narrowed so as to reduce the influence of the off-capacity of the FET 2a.
SOLUTION: A phase shifter is provided with the FET 2a the drain electrode of which is connected to an input-output terminal 1a, another FET 2b, the drain electrode of which is connected to the source electrode of the FET 2a and the source electrode of which is connected to another input-output terminal 1b, an FET 2c the drain electrode of which is connected to the source electrode of the FET 2a, and an inductor 3a, the one end of which is connected to the source electrode of the FET 2c and the other end of which is grounded.


Inventors:
Morishige Hinoeda
Kenichi Miyaguchi
Michiaki Kasahara
Tadashi Takagi
Hiroshi Ikematsu
Norio Takeuchi
Hiroaki Nakaguro
Kazuki Inami
Application Number:
JP2001143654A
Publication Date:
November 25, 2003
Filing Date:
May 14, 2001
Export Citation:
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Assignee:
Mitsubishi Electric Corporation
International Classes:
H01P1/18; H03H7/20; H03H11/18; (IPC1-7): H01P1/18; H03H11/18
Domestic Patent References:
JP8250963A
JP2151113A
Other References:
【文献】米国特許5317290(US,A)
Attorney, Agent or Firm:
Hiroaki Tazawa (1 person outside)