PURPOSE: To provide the mechanism which is directly connected to a general high-speed bus used by an EWS or a personal computer and quickly executes DMA of picture data and the picture processing dependent on this DMA.
CONSTITUTION: The width of a base rectangle area stored in a BW register 12 is added to the relative rectangle area base address stored in a BA register 13 each time when an X counter 17 counts the relative rectangle area width of a W register 14. At the same time, a Y counter 18 is counted up, and the X counter 17 is cleared. The DMA address is given by an access address register 21, and its value is obtained by adding values in the BA register 13 and the X counter 17 in an adder, and this operation is terminated when the Y counter 18 reaches the value in an H register 15.
JP3602293 | Data transfer method and equipment |
JP2011070372 | DMA TRANSMISSION CONTROL DEVICE |
WO/1999/027459 | PROCESSOR LOCAL BUS POSTED DMA FLYBY BURST TRANSFERS |
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