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Title:
PICTURE MEMORY DEVICE
Document Type and Number:
Japanese Patent JPH06326921
Kind Code:
A
Abstract:

PURPOSE: To prevent a picture from being disturbed by managing a memory for storing picture data by field addresses, and if a reading address collides with a writing access, saving one of the accesses to a free area.

CONSTITUTION: In the case of writing operation in the memory, a field address switch 12 outputs a 1st bit (WFO) of a writing field address to a 9th bit (a8) at the time of specifying a horizontal address and outputs a 2nd bit (WF1) of the writing field address to the 9th bit (a8) at the time of specifying a horizontal address. In the case of reading operation from the memory, the switch 12 outputs a 2nd bit (RF1) of a reading field address to the 9th bit (a8) at the time of specifying a transfer line and outputs a 1st bit (FRO) of the reading field address to the 9th bit (a8) at the time of specifying a reading start pointer. Consequently the generation of collision between reading and writing accesses can be prevented and the generation of disturbance in a displaying picture can be also prevented.


Inventors:
SAITO OSAMU
Application Number:
JP11555793A
Publication Date:
November 25, 1994
Filing Date:
May 18, 1993
Export Citation:
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Assignee:
SHARP KK
International Classes:
H04N5/262; G09G5/00; G09G5/36; G09G5/397; G09G5/399; H04N5/45; (IPC1-7): H04N5/262; H04N5/45
Attorney, Agent or Firm:
Yoshio Kawaguchi (1 person outside)



 
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