PURPOSE: To provide a pulse width modulation characteristic with satisfactory linearity by directly inputting the output of a pulse width modulation circuit to an AND circuit through a delay circuit and outputting a part where both input signals are overlapped as an output signal from the AND circuit.

CONSTITUTION: The delay circuit 3 delays the pulse width modulation signal PW outputted from the pulse width modulation circuit 2, sets it to be a delay signal PWd and one of input signal of the AND circuit 4. The circuit 4 takes the AND of an original pulse width modulation signal PW and the delayed pulse with modulation signal PWd and can obtain a pulse width modulation signal PWo where the range in which linearity is inferior is considerably less. Namely, the pulse width modulator 2 slices a triangle wave having distortion approximated to a minimum value by using an analog picture signal DA showing hierarchy density so as to obtain the pulse width modulation signal PW. Then, it is inputted to one of the input terminal in the AND circuit 4. The delay output PWD of the modulator 2, which is delayed by prescribed time via the delay circuit 3, is inputted to the other input terminal of the circuit 4, and the output signal PWo being the AND of both inputs is obtained. At that time, the minimum pulse width of the output signal PWo becomes minimum pulse width which the AND circuit 4 can output.