Title:
半導体デバイスの平坦化
Document Type and Number:
Japanese Patent JP7492307
Kind Code:
B2
Abstract:
In certain embodiments, a method for processing a substrate includes applying a surface treatment to selected surfaces of the substrate. The substrate has a non-planar topography including structures defining recesses. The method further includes depositing a fill material on the substrate by spin-on deposition. The surface treatment directs the fill material to the recesses and away from the selected surfaces to fill the recesses with the fill material without adhering to the selected surfaces. The method further includes removing the surface treatment from the selected surfaces of the substrate and depositing a planarizing film on the substrate by spin-on deposition. The planarizing film is deposited on the selected surfaces and top surfaces of the fill material.
Inventors:
burns, ryan
Somervel, Mark
Remley, Collie
Somervel, Mark
Remley, Collie
Application Number:
JP2021572848A
Publication Date:
May 29, 2024
Filing Date:
June 09, 2020
Export Citation:
Assignee:
東京エレクトロン株式会社
International Classes:
H01L21/312; H01L21/027; H01L21/3065
Domestic Patent References:
| JP2013128096A |
Foreign References:
| US9570302 | ||||
| WO2018182637A1 | ||||
| US4576834 | ||||
| WO2018031926A1 |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Tadahiko Ito
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