PURPOSE: To make the number of clocks of an internal signal variable, without changing a hardware by providing a memory element without stores the internal signal, and the stored contents of which can be rewritten by a CPU.

CONSTITUTION: A signal 11 which is inverted at the leading edge of an external signal 10, is generated by a flip flop 5, and is given to one side of the inputs of a phase comparator 6. The data of two periods portion at every one clock is written in a memory 3 from a CPU data bus, and the output signal 8 of the memory 3 is inputted to other side of the inputs of the phase comparator 6, and is phase-compared with the signal 11, and an error voltage is generated. As responding to this error voltage, a voltage controlled oscillator 7 changes the frequency of the clock 12. Thus, because the rewritable memory element is used for generating an internal phase comparison signal, the number of clocks of the internal signal can be programably changed without changing the hardware.